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3-D Modeling of PCB designs from EAGLE

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When working with fellow designers on electronic device projects, I have found providing a 3-D model of my PCB designs quite useful for describing the general placement of connectors and components on the PCB. A 3-D model communicates the little informational details that can trip up a project, such as: the polarization a given connector is expected to connect, where the mounting holes are expected to be drilled, and how much clearance mechanical devices might need to be physically accessible.

I’m fond of using EAGLE for my PCB designs, and typically use the Eagle3D expansion to generate 3D renderings of the designs. Eagle3D (which can be found here) is a ULP script for EAGLE. The resultant is a text file with a *.pov extension, written in a format to be read by POV-Ray (found here). POV-Ray is software package that generates ray-traced models from *.pov files.

Here’s an example of the PCB design and the resulting 3-D model:

Printed Circuit Board design for FTC-200: Open-Source

3-D Model from POV-Ray of the FTC-200 Open Source PCB board design

Here are two excellent reference articles describing the exact process and other extensions to this procedure:

Written by sturnfie

October 16th, 2010 at 7:45 pm

Posted in Design,EAGLE,Model,PCB

Solder-Mask and Cream-Mask DFM Warnings on EAGLE Designs

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EAGLE CAD (manufacturer link) has a neat feature for automatically generating the solder and cream masks for SMD pads and vias when designing printed circuit boards. A solder-mask is used to protect the copper from oxidization, while acting as something of an isolation channel to prevent solder from bridging across closely spaced pins/pads. A cream-mask is used to define a region for automated application of solder paste.

In EAGLE, the default setting for the mask placement over a board feature is to generate a region that is 3% larger than the feature on each side. This is occasionally enough to trigger all sorts of warnings when running a PCB design through a Design For Manufacturing check, especially with designs that include high-density IC packages. Such packages simply don’t have the space between pins to allow for an additional 3% clearance while adhering to the PCB shop’s manufacturing limitations.

The auto mask generation feature in EAGLE can be configured in the Design Rule Check tool, under the Masks tab. Here’s a screen shot of the tab, along with the settings I use when sending designs to SunStone Circuits for manufacturing.

Screenshot of the Design Rule Check --> Masks tab in EAGLE

Written by sturnfie

October 13th, 2010 at 12:09 pm

Posted in Design,EAGLE,PCB,Tip